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System-Level Design Techniques for Energy-Efficient Embedded Systems

Marcus T. Schmitz Bashir M. Al-Hashimi Petru Eles

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Hardback

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English
Kluwer Academic Publishers
31 December 2003
By shrinking feature sizes, deep-submicron technology is enabling the design of systems with increased complexity on a single chip, but it is also introducing a productivity design gap. Additionally, system designers have to cope with an ever-increasing application complexity and shrinking time-to-market windows. Design re-use and system-level co-synthesis are two approaches that are being employed to bridge the design gap and to aid system designers. Power consumption has become one of the main barriers in embedded computing systems

design and therefore, methodologies and techniques that provide power-aware hardware/software co-design are necessary. System-Level Design Techniques for Energy-Efficient Embedded

Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone. System-Level Design Techniques for Energy-Efficient Embedded Systems will be of interest to advanced undergraduates, graduate students, and designers, whom are interested in energy-efficient embedded systems design.
By:   , ,
Imprint:   Kluwer Academic Publishers
Country of Publication:   United States
Edition:   2004 ed.
Dimensions:   Height: 235mm,  Width: 155mm,  Spine: 14mm
Weight:   1.080kg
ISBN:   9781402077500
ISBN 10:   1402077505
Pages:   194
Publication Date:  
Audience:   College/higher education ,  Professional and scholarly ,  Further / Higher Education ,  Undergraduate
Format:   Hardback
Publisher's Status:   Active
Background.- Power Variation-Driven Dynamic Voltage Scaling.- Optimisation of Mapping and Scheduling for Dynamic Voltage Scaling.- Energy-Efficient Multi-mode Embedded Systems.- Dynamic Voltage Scaling for Control Flow-Intensive Applications.- LOPOCOS: A Prototype Low Power Co-Synthesis Tool.- Conclusion.

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