VLSI Design Environments investigates design alternatives such as object oriented data modelling. The difficulty of automating chip architecture designs is caused by the complexity of the problem. The explosion of design decions make a heuristic approach necessary. PLAYOUT aims at the solution of system problems based on hierarchy, top-down planning, silicon complier presentations, advances in encoding logic synthesis and a microarchitecre and logic optimization system. PLAYOUT supports the physical design from entering the structure of digital systems to the generation of the mask. The concept for autonomous tools with a clear interface to the network description and the simple interface to the graphics is presented. This enables the designer to have a great influence on the configuration of the placement of the schematic diagram. Substantial progress is being made in behavioural and logic synthesis, both of which depend upon specifications.
Edited by:
George Zobrist
Imprint: Taylor & Francis Ltd
Country of Publication: United Kingdom
Dimensions:
Height: 229mm,
Width: 152mm,
Spine: 27mm
Weight: 1.550kg
ISBN: 9789056996673
ISBN 10: 9056996673
Pages: 328
Publication Date: 17 April 2000
Audience:
Professional and scholarly
,
Professional and scholarly
,
Professional & Vocational
,
Undergraduate
,
Further / Higher Education
Format: Hardback
Publisher's Status: Active
Taking a heuristic approach, VLSI Design Environments investigates design alternatives such as object oriented data modelling. PLAYOUT aims at the solution of system problems based on hierarchy, top-down planning, silicon complier presentations, advances in encoding logic synthesis, and a microarchitecre and logic optimization system. PLAYOUT supports the physical design from entering the structure of digital systems to the generation of the mask. The concept for autonomous tools with a clear interface to the network description and the simple interface to the graphics is presented. This enables the designer to have a great influence on the configuration of the placement of the schematic diagram.
