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Speculative Execution in High Performance Computer Architectures by David Kaeli at Abbey's Bookshop,
Speculative Execution in High Performance Computer Architectures
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David Kaeli Pen-Chung Yew

Speculative Execution in High Performance Computer Architectures

David Kaeli,  Pen-Chung Yew,  Sartaj Sahni (University of Florida, Gainesville, USA) ,  Joshua J. Yi (Freescale Semiconductor, Inc., Austin, Texas, USA)

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English
Chapman & Hall/CRC
26 May 2005
Computer architecture & logic design
Series: Chapman & Hall/CRC Computer and Information Science Series
This is the first book to thoroughly describe some of the speculative execution techniques used to overcome performance

problems in modern computer architectures. It discusses both cutting-edge research projects as well as a number of commercial implementations that illustrate the value of this latency-hiding technique. A review section covers various control speculation techniques that use instruction cache prefetching, branch prediction, and multipath execution. The authors also address several more recent speculative multithreaded

approaches with an emphasis on profile-guided speculation, speculative architectures, and the compiler techniques needed to support these approaches. Kaeli; David Northeastern University, Boston, Massachusetts, USA,Yew; Pen-Chung University of Minnesota, Minneapolis, Minnesota, USA,
Contributions by:  
Edited by:   , , , ,
Series edited by:  
Imprint:   Chapman & Hall/CRC
Country of Publication:   United States
Volume:   6
Dimensions:   Height: 234mm,  Width: 156mm,  Spine: 29mm
Weight:   771g
ISBN:   9781584884477
ISBN 10:   1584884479
Series:   Chapman & Hall/CRC Computer and Information Science Series
Pages:   456
Publication Date:  
Audience:   Professional and scholarly ,  Professional and scholarly ,  Professional & Vocational ,  Undergraduate ,  Further / Higher Education
Format:   Hardback
Publisher's Status:   Active
Introduction. Instruction cache prefetching. Branch prediction. Trace caches. Branch predication. Multipath execution. Data cache prefetching. Address prediction. Data speculation. Instruction precomputation: Dynamically removing redundant computations using profiling. Profile-Based speculation. Compilation and speculation. Multithreading and speculation. Exploiting Load/Store parallelism via memory dependence prediction. Resource flow microarchitectures.

David Kaeli, Pen-Chung Yew

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