Guide to RISC Processors

for Programmers and Engineers

Sivarama P. Dandamudi

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Hardback

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English

Springer-Verlag New York Inc.
16 February 2005

Microprocessors; Computer hardware; Computer programming & software development; Software Engineering; Computer architecture & logic design

Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource.

By: Sivarama P. Dandamudi
Imprint: Springer-Verlag New York Inc.
Country of Publication: United States
Edition: 2005 ed.
Dimensions: Height: 254mm, Width: 178mm, Spine: 23mm
Weight: 2.020kg
ISBN: 9780387210179
ISBN 10: 0387210172
Pages: 388
Publication Date: 16 February 2005
Audience: Professional and scholarly , Undergraduate
Format: Hardback
Publisher's Status: Active

Overview.- Processor Design Issues.- RISC Principles.- Architectures.- MIPS Architecture.- SPARC Architecture.- PowerPC Architecture.- Itanium Architecture.- ARM Architecture.- MIPS Assembly Language.- SPIM Simulator and Debugger.- Assembly Language Overview.- Procedures and the Stack.- Addressing Modes.- Arithmetic Instructions.- Conditional Execution.- Logical and Shift Operations.- Recursion.- Floating-Point Operations.