Although multicore is now a mainstream architecture, there are few textbooks that cover parallel multicore architectures. Filling this gap, Fundamentals of Parallel Multicore Architecture provides all the material for a graduate or senior undergraduate course that focuses on the architecture of multicore processors. The book is also useful as a reference for professionals who deal with programming on multicore or designing multicore chips.
The text's coverage of fundamental topics prepares students to study research papers in the multicore architecture area. The text offers many pedagogical features, including:
Sufficiently short chapters that can be comfortably read over a weekend Introducing each concept by first describing the problem and building intuition that leads to the need for the concept Did you know? boxes that present mini case studies, alternative points of view, examples, and other interesting facts or discussion items Thought-provoking interviews with experts who share their perspectives on multicore architectures in the past, present, and future Online programming assignments and solutions that enhance students' understanding The first several chapters address programming issues in shared memory multiprocessors, such as the programming model and techniques to parallelize regular and irregular applications. The core of the book covers the architectures for shared memory multiprocessors. The final chapter contains interviews with experts in parallel multicore architecture.
Country of Publication:
30 June 2020
Perspectives on Multicore Architectures. Perspectives on Parallel Programming. Shared Memory Parallel Programming. Parallel Programming for Linked Data Structures. Introduction to Memory Hierarchy Organization. Introduction to Shared Memory Multiprocessors. Basic Cache Coherence Issues. Hardware Support for Synchronization. Memory Consistency Models. Advanced Cache Coherence Issues. Interconnection Network Architecture. SIMT Architecture. Ask the Experts.
Yan Solihin is a professor of electrical and computer engineering at North Carolina State University, where he founded and leads the Architecture Research for Performance, Reliability, and Security (ARPERS) group. Dr. Solihin has been a recipient of the IBM Faculty Partnership Award, NSF Faculty Early Career Award, and AT&T Leadership Award. He is listed in the HPCA Hall of Fame and is a senior member of the IEEE. His research interests include computer architecture, computer system modeling methods, and image processing.
Reviews for Fundamentals of Parallel Multicore Architecture
This text provides a lucid and comprehensive treatment of hardware/software foundations of parallel architectures by a leading expert in the area. -Rajeev Balasubramonian, University of Utah This book does an excellent job covering parallel multicore architectures and their programming models. It covers these topics in the crucial context of advanced memory hierarchy designs. The text is accessible to senior undergraduate students and graduate students in computer science and computer engineering. ... a self-contained reference for the target audience; the text is comprehensive and strikes a good balance between the principles and in-depth details of modern multicore architecture designs. -Robert van Engelen, Florida State University The author first discusses the basic hardware and history of multicore architectures, then discusses the basic ideas of how to analyze code to determine parallelism (and the basic concepts of different parallelism techniques), and then discusses the specifics of how to write shared memory parallel programs, and so on. In this way, the topics become increasingly focused on the desired content of the book, that of the details in constructing multicore architectures. This book is well organized and thought out, and I imagine that it [will be] well received by students. -Daniel R. Reynolds, Southern Methodist University ... this book would be appealing to students and practitioners who would like to get an in-depth understanding of multicore architecture and designing efficient programs for these architectures. -Purushotham Bangalore, University of Alabama at Birmingham