Computer Memories 2

Name: Computer Memories 2
Price: 281.95 AUD
Availability: PreOrder
ISBN: 9781836690634

Static Random-Access Memory

Philippe Darche (Institut Universitaire de Technologie (IUT) de Paris)

$281.95

Hardback

Forthcoming
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English

ISTE Ltd
03 April 2026

Storage media & peripherals; Information retrieval; Computer networking & communications; Computer architecture & logic design

Series: ISTE Invoiced

Memory, the second function of a computer, has gradually become more complex in order to meet growing needs in terms of capacity, speed, security and energy efficiency. It takes the form of a component or system, such as a memory subassembly or a mass storage device.

For several decades, there has been a strong trend towards integrating memory directly into the processor under the term embedded memory, of which cache memory is a typical example. Understanding its internal mechanisms and interfacing is essential for mastering the operation of a computer and programming it efficiently.

Computer Memories 2 focuses on the static storage cell and its associated component, known as static random-access memory. The first part presents the main temporal characteristics of a generic random-access memory, as well as its electrical and mechanical properties, including aspects related to encapsulation. The second part focuses on the study of the first category of random-access semiconductor memory: asynchronous static memory, commonly referred to by the acronym SRAM (static random-access memory). The book details its temporal, electrical and mechanical characteristics, providing an in-depth understanding of its operation and technical specifications.

By: Philippe Darche (Institut Universitaire de Technologie (IUT) de Paris)
Imprint: ISTE Ltd
Country of Publication: United Kingdom
ISBN: 9781836690634
ISBN 10: 1836690630
Series: ISTE Invoiced
Pages: 256
Publication Date: 03 April 2026
Audience: Professional and scholarly , Undergraduate
Format: Hardback
Publisher's Status: Forthcoming

Philippe Darche is Lecturer in Computer Science at the University Institute of Technology (IUT) of Paris – Rives de Seine and Researcher in the Distributed Algorithms and Systems (DeLyS) team at LIP6, Sorbonne University, France. He is also the author of fifteen books on computer architecture.